Foil 14.7 : VHDL-AMS AD ans DA interactions

if one of the quantities crosses a specific value considered as threshold before the end of the calculation of the solution (next event), the analog solver will end the solution cycle prematurely.
a boolean attribute above was introduced to detect the thresholds.
for the scalar value Q, a boolean signal with value true is generated by Q'above(level) if Q>level, and false otherwise.
the detection of the overflow of a threshold can be used for the Analog - Digital (AD) conversion:

AD converter model:

entity sadc is -- simple analog to digital converter

generic (niveau: real:= 2.5); -- threshold

port (terminal at: electrical; -- analog input

signal ds: out bit); -- digital output

end sadc;

architecture simple of sadc is

quantity vq across at; - - across quantity to ground

begin

ds <= `1' when vq'above(level) -- vq > level

else `0'; -- vq <level

end simple;

Discontinuities in DAE solution:

if a discontinuity appears in the solution of the DAE a specific break mechanisms (break) indicates it to analog solver
break generates a pseudo-event each time when a discontinuity is detected.
a discontinuity may appear in a simultaneous statement using a signal when an event intervenes on this signal
the execution of a break statement generates an implicit signal used to reactivate the analog process
the semantics of the language requires that the solver assumes the discontinuity when the process containing to the signal break is active
the declaration of break provides also a means to specify the initial conditions for selected quantities to be applied after discontinuity.

Digital analog converter model:

entity sdac is

generic (vdd: real: = 5.0);
-- vdd constant for analog output

port (signal ds: in bit; -- logic input

terminal at: electrical); -- analog output

end sdac;

architecture simple of sdac is

quantity vq across at; - - branch quantity to ground

begin

if ds ='0' use

vq==0.0; -- low output

else

vq==vdd; -- high output

end use;

break on ds; - - prevision of discontinuity

end simple;

a model has to include an appropriate break declaration if the name of a signal appears in an expression of a simultaneous statement and if an event on this signal may cause discontinuity
break instruction is also required if a discontinuity is due to the selection of a new simultaneous statement when the value of an if condition changes (see the example above)

A/D and D/A interactions