--H1_q[4] is clk_div:38|lpm_counter:count_1Mhz_rtl_0|alt_counter_f10ke:wysi_counter|q[4] at LC8_D9
--operation mode is clrb_cntr

H1_q[4]_lut_out = (H1_q[4] $ H1L9) & E1L32;
H1_q[4] = DFFEA(H1_q[4]_lut_out, GLOBAL(Clock_25Mhz), , , , , );


--H1_q[3] is clk_div:38|lpm_counter:count_1Mhz_rtl_0|alt_counter_f10ke:wysi_counter|q[3] at LC7_D9
--operation mode is clrb_cntr

H1_q[3]_lut_out = (H1_q[3] $ H1L7) & E1L32;
H1_q[3] = DFFEA(H1_q[3]_lut_out, GLOBAL(Clock_25Mhz), , , , , );

--H1L9 is clk_div:38|lpm_counter:count_1Mhz_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT at LC7_D9
--operation mode is clrb_cntr

H1L9 = CARRY(H1_q[3] & H1L7);


--H1_q[2] is clk_div:38|lpm_counter:count_1Mhz_rtl_0|alt_counter_f10ke:wysi_counter|q[2] at LC6_D9
--operation mode is clrb_cntr

H1_q[2]_lut_out = (H1_q[2] $ H1L5) & E1L32;
H1_q[2] = DFFEA(H1_q[2]_lut_out, GLOBAL(Clock_25Mhz), , , , , );

--H1L7 is clk_div:38|lpm_counter:count_1Mhz_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC6_D9
--operation mode is clrb_cntr

H1L7 = CARRY(H1_q[2] & H1L5);


--H1_q[1] is clk_div:38|lpm_counter:count_1Mhz_rtl_0|alt_counter_f10ke:wysi_counter|q[1] at LC5_D9
--operation mode is clrb_cntr

H1_q[1]_lut_out = (H1_q[1] $ H1L3) & E1L32;
H1_q[1] = DFFEA(H1_q[1]_lut_out, GLOBAL(Clock_25Mhz), , , , , );

--H1L5 is clk_div:38|lpm_counter:count_1Mhz_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC5_D9
--operation mode is clrb_cntr

H1L5 = CARRY(H1_q[1] & H1L3);


--H1_q[0] is clk_div:38|lpm_counter:count_1Mhz_rtl_0|alt_counter_f10ke:wysi_counter|q[0] at LC4_D9
--operation mode is clrb_cntr

H1_q[0]_lut_out = (!H1_q[0]) & E1L32;
H1_q[0] = DFFEA(H1_q[0]_lut_out, GLOBAL(Clock_25Mhz), , , , , );

--H1L3 is clk_div:38|lpm_counter:count_1Mhz_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC4_D9
--operation mode is clrb_cntr

H1L3 = CARRY(H1_q[0]);


--F1_8 is 8count:21|f8count:sub|8 at LC1_C28
--operation mode is arithmetic

F1_8_lut_out = !F1_8;
F1_8 = DFFEA(F1_8_lut_out, GLOBAL(D1L1Q), PB2, , , , );

--F1_245 is 8count:21|f8count:sub|245 at LC1_C28
--operation mode is arithmetic

F1_245 = CARRY(F1_8);


--F1_7 is 8count:21|f8count:sub|7 at LC2_C28
--operation mode is up_dn_cntr

F1_7_lut_out = F1_7 $ F1_245;
F1_7 = DFFEA(F1_7_lut_out, GLOBAL(D1L1Q), PB2, , , , );

--F1_246 is 8count:21|f8count:sub|246 at LC2_C28
--operation mode is up_dn_cntr

F1_246 = CARRY(F1_7 & F1_245);


--F1_6 is 8count:21|f8count:sub|6 at LC3_C28
--operation mode is up_dn_cntr

F1_6_lut_out = F1_6 $ F1_246;
F1_6 = DFFEA(F1_6_lut_out, GLOBAL(D1L1Q), PB2, , , , );

--F1_247 is 8count:21|f8count:sub|247 at LC3_C28
--operation mode is up_dn_cntr

F1_247 = CARRY(F1_6 & F1_246);


--F1_5 is 8count:21|f8count:sub|5 at LC4_C28
--operation mode is up_dn_cntr

F1_5_lut_out = F1_5 $ F1_247;
F1_5 = DFFEA(F1_5_lut_out, GLOBAL(D1L1Q), PB2, , , , );

--F1_248 is 8count:21|f8count:sub|248 at LC4_C28
--operation mode is up_dn_cntr

F1_248 = CARRY(F1_5 & F1_247);


--C2L7 is dec_7seg:36|segment_data[6]~0 at LC7_C44
--operation mode is normal

C2L7 = F1_6 & !F1_7 & (F1_8 $ !F1_5) # !F1_6 & F1_8 & (F1_7 $ !F1_5);


--C2L6 is dec_7seg:36|segment_data[5]~2 at LC8_C44
--operation mode is normal

C2L6 = F1_7 & (F1_8 & F1_5 # !F1_8 & F1_6) # !F1_7 & F1_6 & (F1_8 $ F1_5);


--C2L5 is dec_7seg:36|segment_data[4]~4 at LC1_C44
--operation mode is normal

C2L5 = F1_6 & F1_5 & (F1_7 # !F1_8) # !F1_6 & !F1_8 & F1_7 & !F1_5;


--C2L4 is dec_7seg:36|segment_data[3]~6 at LC3_C44
--operation mode is normal

C2L4 = F1_7 & (F1_8 & F1_6 # !F1_8 & !F1_6 & F1_5) # !F1_7 & !F1_5 & (F1_8 $ F1_6);


--C2L3 is dec_7seg:36|segment_data[2]~8 at LC5_C44
--operation mode is normal

C2L3 = F1_7 & F1_8 & !F1_5 # !F1_7 & (F1_6 & !F1_5 # !F1_6 & F1_8);


--C2L2 is dec_7seg:36|segment_data[1]~10 at LC6_C44
--operation mode is normal

C2L2 = F1_8 & (F1_5 $ (F1_7 # !F1_6)) # !F1_8 & F1_7 & !F1_6 & !F1_5;


--C2L1 is dec_7seg:36|segment_data[0]~12 at LC7_C50
--operation mode is normal

C2L1 = F1_8 & (F1_5 # F1_7 $ F1_6) # !F1_8 & (F1_7 # F1_6 $ F1_5);


--F1_4 is 8count:21|f8count:sub|4 at LC5_C28
--operation mode is up_dn_cntr

F1_4_lut_out = F1_4 $ F1_248;
F1_4 = DFFEA(F1_4_lut_out, GLOBAL(D1L1Q), PB2, , , , );

--F1_249 is 8count:21|f8count:sub|249 at LC5_C28
--operation mode is up_dn_cntr

F1_249 = CARRY(F1_4 & F1_248);


--F1_3 is 8count:21|f8count:sub|3 at LC6_C28
--operation mode is up_dn_cntr

F1_3_lut_out = F1_3 $ F1_249;
F1_3 = DFFEA(F1_3_lut_out, GLOBAL(D1L1Q), PB2, , , , );

--F1_250 is 8count:21|f8count:sub|250 at LC6_C28
--operation mode is up_dn_cntr

F1_250 = CARRY(F1_3 & F1_249);


--F1_2 is 8count:21|f8count:sub|2 at LC7_C28
--operation mode is up_dn_cntr

F1_2_lut_out = F1_2 $ F1_250;
F1_2 = DFFEA(F1_2_lut_out, GLOBAL(D1L1Q), PB2, , , , );

--F1_251 is 8count:21|f8count:sub|251 at LC7_C28
--operation mode is up_dn_cntr

F1_251 = CARRY(F1_2 & F1_250);


--F1_1 is 8count:21|f8count:sub|1 at LC8_C28
--operation mode is normal

F1_1_lut_out = F1_251 $ F1_1;
F1_1 = DFFEA(F1_1_lut_out, GLOBAL(D1L1Q), PB2, , , , );


--C1L7 is dec_7seg:33|segment_data[6]~0 at LC1_A36
--operation mode is normal

C1L7 = F1_2 & !F1_3 & (F1_4 $ !F1_1) # !F1_2 & F1_4 & (F1_3 $ !F1_1);


--C1L6 is dec_7seg:33|segment_data[5]~2 at LC3_A52
--operation mode is normal

C1L6 = F1_3 & (F1_4 & F1_1 # !F1_4 & F1_2) # !F1_3 & F1_2 & (F1_4 $ F1_1);


--C1L5 is dec_7seg:33|segment_data[4]~4 at LC5_A36
--operation mode is normal

C1L5 = F1_2 & F1_1 & (F1_3 # !F1_4) # !F1_2 & !F1_4 & F1_3 & !F1_1;


--C1L4 is dec_7seg:33|segment_data[3]~6 at LC7_A36
--operation mode is normal

C1L4 = F1_3 & (F1_4 & F1_2 # !F1_4 & !F1_2 & F1_1) # !F1_3 & !F1_1 & (F1_4 $ F1_2);


--C1L3 is dec_7seg:33|segment_data[2]~8 at LC8_A36
--operation mode is normal

C1L3 = F1_3 & F1_4 & !F1_1 # !F1_3 & (F1_2 & !F1_1 # !F1_2 & F1_4);


--C1L2 is dec_7seg:33|segment_data[1]~10 at LC1_B33
--operation mode is normal

C1L2 = F1_4 & (F1_1 $ (F1_3 # !F1_2)) # !F1_4 & F1_3 & !F1_2 & !F1_1;


--C1L1 is dec_7seg:33|segment_data[0]~12 at LC3_B32
--operation mode is normal

C1L1 = F1_4 & (F1_1 # F1_3 $ F1_2) # !F1_4 & (F1_3 # F1_2 $ F1_1);


--D1L1Q is debounce:37|pb_debounced~reg0 at LC1_D4
--operation mode is normal

D1L1Q_lut_out = D1_SHIFT_PB[2] # D1_SHIFT_PB[1] # D1_SHIFT_PB[0] # D1_SHIFT_PB[3];
D1L1Q = DFFEA(D1L1Q_lut_out, E1L5Q, , , , , );


--D1_SHIFT_PB[2] is debounce:37|SHIFT_PB[2] at LC2_D4
--operation mode is normal

D1_SHIFT_PB[2]_lut_out = D1_SHIFT_PB[3];
D1_SHIFT_PB[2] = DFFEA(D1_SHIFT_PB[2]_lut_out, E1L5Q, , , , , );


--D1_SHIFT_PB[1] is debounce:37|SHIFT_PB[1] at LC3_D4
--operation mode is normal

D1_SHIFT_PB[1]_lut_out = D1_SHIFT_PB[2];
D1_SHIFT_PB[1] = DFFEA(D1_SHIFT_PB[1]_lut_out, E1L5Q, , , , , );


--D1_SHIFT_PB[0] is debounce:37|SHIFT_PB[0] at LC4_D4
--operation mode is normal

D1_SHIFT_PB[0]_lut_out = D1_SHIFT_PB[1];
D1_SHIFT_PB[0] = DFFEA(D1_SHIFT_PB[0]_lut_out, E1L5Q, , , , , );


--D1_SHIFT_PB[3] is debounce:37|SHIFT_PB[3] at LC5_D4
--operation mode is normal

D1_SHIFT_PB[3]_lut_out = !PB1;
D1_SHIFT_PB[3] = DFFEA(D1_SHIFT_PB[3]_lut_out, E1L5Q, , , , , );


--E1L5Q is clk_div:38|clock_100Hz~reg0 at LC1_D19
--operation mode is normal

E1L5Q_lut_out = E1_clock_100hz_int;
E1L5Q = DFFEA(E1L5Q_lut_out, GLOBAL(Clock_25Mhz), , , , , );


--E1_clock_100hz_int is clk_div:38|clock_100hz_int at LC2_D19
--operation mode is normal

E1_clock_100hz_int_lut_out = !E1_clock_100hz_int;
E1_clock_100hz_int = DFFEA(E1_clock_100hz_int_lut_out, E1_clock_1Khz_int, , , E1L42, , );


--E1_clock_1Khz_int is clk_div:38|clock_1Khz_int at LC1_D25
--operation mode is normal

E1_clock_1Khz_int_lut_out = !E1_clock_1Khz_int;
E1_clock_1Khz_int = DFFEA(E1_clock_1Khz_int_lut_out, E1_clock_10Khz_int, , , E1L52, , );


--E1_count_100hz[1] is clk_div:38|count_100hz[1] at LC3_D19
--operation mode is normal

E1_count_100hz[1]_lut_out = E1_count_100hz[1] $ E1_count_100hz[0];
E1_count_100hz[1] = DFFEA(E1_count_100hz[1]_lut_out, E1_clock_1Khz_int, , , , , );


--E1_count_100hz[0] is clk_div:38|count_100hz[0] at LC4_D19
--operation mode is normal

E1_count_100hz[0]_lut_out = !E1_count_100hz[0] & (E1_count_100hz[1] # !E1_count_100hz[2]);
E1_count_100hz[0] = DFFEA(E1_count_100hz[0]_lut_out, E1_clock_1Khz_int, , , , , );


--E1_count_100hz[2] is clk_div:38|count_100hz[2] at LC5_D19
--operation mode is normal

E1_count_100hz[2]_lut_out = E1_count_100hz[2] & (E1_count_100hz[1] $ E1_count_100hz[0]) # !E1_count_100hz[2] & E1_count_100hz[1] & E1_count_100hz[0];
E1_count_100hz[2] = DFFEA(E1_count_100hz[2]_lut_out, E1_clock_1Khz_int, , , , , );


--E1L42 is clk_div:38|i~239 at LC6_D19
--operation mode is normal

E1L42 = !E1_count_100hz[1] & !E1_count_100hz[0] & E1_count_100hz[2];


--E1_clock_10Khz_int is clk_div:38|clock_10Khz_int at LC1_D16
--operation mode is normal

E1_clock_10Khz_int_lut_out = !E1_clock_10Khz_int;
E1_clock_10Khz_int = DFFEA(E1_clock_10Khz_int_lut_out, E1_clock_100Khz_int, , , E1L62, , );


--E1_count_1Khz[1] is clk_div:38|count_1Khz[1] at LC2_D25
--operation mode is normal

E1_count_1Khz[1]_lut_out = E1_count_1Khz[1] $ E1_count_1Khz[0];
E1_count_1Khz[1] = DFFEA(E1_count_1Khz[1]_lut_out, E1_clock_10Khz_int, , , , , );


--E1_count_1Khz[0] is clk_div:38|count_1Khz[0] at LC3_D25
--operation mode is normal

E1_count_1Khz[0]_lut_out = !E1_count_1Khz[0] & (E1_count_1Khz[1] # !E1_count_1Khz[2]);
E1_count_1Khz[0] = DFFEA(E1_count_1Khz[0]_lut_out, E1_clock_10Khz_int, , , , , );


--E1_count_1Khz[2] is clk_div:38|count_1Khz[2] at LC4_D25
--operation mode is normal

E1_count_1Khz[2]_lut_out = E1_count_1Khz[2] & (E1_count_1Khz[1] $ E1_count_1Khz[0]) # !E1_count_1Khz[2] & E1_count_1Khz[1] & E1_count_1Khz[0];
E1_count_1Khz[2] = DFFEA(E1_count_1Khz[2]_lut_out, E1_clock_10Khz_int, , , , , );


--E1L52 is clk_div:38|i~240 at LC5_D25
--operation mode is normal

E1L52 = !E1_count_1Khz[1] & !E1_count_1Khz[0] & E1_count_1Khz[2];


--E1_clock_100Khz_int is clk_div:38|clock_100Khz_int at LC1_D22
--operation mode is normal

E1_clock_100Khz_int_lut_out = !E1_clock_100Khz_int;
E1_clock_100Khz_int = DFFEA(E1_clock_100Khz_int_lut_out, E1_clock_1Mhz_int, , , E1L72, , );


--E1_count_10Khz[1] is clk_div:38|count_10Khz[1] at LC2_D16
--operation mode is normal

E1_count_10Khz[1]_lut_out = E1_count_10Khz[1] $ E1_count_10Khz[0];
E1_count_10Khz[1] = DFFEA(E1_count_10Khz[1]_lut_out, E1_clock_100Khz_int, , , , , );


--E1_count_10Khz[0] is clk_div:38|count_10Khz[0] at LC3_D16
--operation mode is normal

E1_count_10Khz[0]_lut_out = !E1_count_10Khz[0] & (E1_count_10Khz[1] # !E1_count_10Khz[2]);
E1_count_10Khz[0] = DFFEA(E1_count_10Khz[0]_lut_out, E1_clock_100Khz_int, , , , , );


--E1_count_10Khz[2] is clk_div:38|count_10Khz[2] at LC4_D16
--operation mode is normal

E1_count_10Khz[2]_lut_out = E1_count_10Khz[2] & (E1_count_10Khz[1] $ E1_count_10Khz[0]) # !E1_count_10Khz[2] & E1_count_10Khz[1] & E1_count_10Khz[0];
E1_count_10Khz[2] = DFFEA(E1_count_10Khz[2]_lut_out, E1_clock_100Khz_int, , , , , );


--E1L62 is clk_div:38|i~241 at LC5_D16
--operation mode is normal

E1L62 = !E1_count_10Khz[1] & !E1_count_10Khz[0] & E1_count_10Khz[2];


--E1_clock_1Mhz_int is clk_div:38|clock_1Mhz_int at LC1_D9
--operation mode is normal

E1_clock_1Mhz_int_lut_out = H1_q[4] # H1_q[3] & H1_q[2];
E1_clock_1Mhz_int = DFFEA(E1_clock_1Mhz_int_lut_out, GLOBAL(Clock_25Mhz), , , , , );


--E1_count_100Khz[1] is clk_div:38|count_100Khz[1] at LC2_D22
--operation mode is normal

E1_count_100Khz[1]_lut_out = E1_count_100Khz[1] $ E1_count_100Khz[0];
E1_count_100Khz[1] = DFFEA(E1_count_100Khz[1]_lut_out, E1_clock_1Mhz_int, , , , , );


--E1_count_100Khz[0] is clk_div:38|count_100Khz[0] at LC3_D22
--operation mode is normal

E1_count_100Khz[0]_lut_out = !E1_count_100Khz[0] & (E1_count_100Khz[1] # !E1_count_100Khz[2]);
E1_count_100Khz[0] = DFFEA(E1_count_100Khz[0]_lut_out, E1_clock_1Mhz_int, , , , , );


--E1_count_100Khz[2] is clk_div:38|count_100Khz[2] at LC4_D22
--operation mode is normal

E1_count_100Khz[2]_lut_out = E1_count_100Khz[2] & (E1_count_100Khz[1] $ E1_count_100Khz[0]) # !E1_count_100Khz[2] & E1_count_100Khz[1] & E1_count_100Khz[0];
E1_count_100Khz[2] = DFFEA(E1_count_100Khz[2]_lut_out, E1_clock_1Mhz_int, , , , , );


--E1L72 is clk_div:38|i~242 at LC5_D22
--operation mode is normal

E1L72 = !E1_count_100Khz[1] & !E1_count_100Khz[0] & E1_count_100Khz[2];


--E1L32 is clk_div:38|i~52 at LC2_D9
--operation mode is normal

E1L32 = !H1_q[3] # !H1_q[4];


--PB2 is PB2 at Pin_29
--operation mode is input

PB2 = INPUT();


--PB1 is PB1 at Pin_28
--operation mode is input

PB1 = INPUT();


--Clock_25Mhz is Clock_25Mhz at Pin_91
--operation mode is input

Clock_25Mhz = INPUT();


--LSD_SEG_A is LSD_SEG_A at Pin_17
--operation mode is output

LSD_SEG_A = OUTPUT(C2L7);


--LSD_SEG_B is LSD_SEG_B at Pin_18
--operation mode is output

LSD_SEG_B = OUTPUT(C2L6);


--LSD_SEG_C is LSD_SEG_C at Pin_19
--operation mode is output

LSD_SEG_C = OUTPUT(C2L5);


--LSD_SEG_D is LSD_SEG_D at Pin_20
--operation mode is output

LSD_SEG_D = OUTPUT(C2L4);


--LSD_SEG_E is LSD_SEG_E at Pin_21
--operation mode is output

LSD_SEG_E = OUTPUT(C2L3);


--LSD_SEG_F is LSD_SEG_F at Pin_23
--operation mode is output

LSD_SEG_F = OUTPUT(C2L2);


--LSD_SEG_G is LSD_SEG_G at Pin_24
--operation mode is output

LSD_SEG_G = OUTPUT(!C2L1);


--MSD_SEG_A is MSD_SEG_A at Pin_6
--operation mode is output

MSD_SEG_A = OUTPUT(C1L7);


--MSD_SEG_B is MSD_SEG_B at Pin_7
--operation mode is output

MSD_SEG_B = OUTPUT(C1L6);


--MSD_SEG_C is MSD_SEG_C at Pin_8
--operation mode is output

MSD_SEG_C = OUTPUT(C1L5);


--MSD_SEG_D is MSD_SEG_D at Pin_9
--operation mode is output

MSD_SEG_D = OUTPUT(C1L4);


--MSD_SEG_E is MSD_SEG_E at Pin_11
--operation mode is output

MSD_SEG_E = OUTPUT(C1L3);


--MSD_SEG_F is MSD_SEG_F at Pin_12
--operation mode is output

MSD_SEG_F = OUTPUT(C1L2);


--MSD_SEG_G is MSD_SEG_G at Pin_13
--operation mode is output

MSD_SEG_G = OUTPUT(!C1L1);


--LSD_SEG_DP is LSD_SEG_DP at Pin_25
--operation mode is output

LSD_SEG_DP = OUTPUT(VCC);


--MSD_SEG_DP is MSD_SEG_DP at Pin_14
--operation mode is output

MSD_SEG_DP = OUTPUT(VCC);


